The present invention relates to the field of integrated circuits and in particular, to an integrated circuit having a programmable logic array portion with volatile configuration memory and a nonvolatile memory array portion.
Integrated circuits are important building blocks of the modern age. Technology continues to evolve and integrated circuits continue to provide improved functionality. As integrated circuits improve, so do the electronics systems that are built using integrated circuits. There are many types of integrated circuits such as memories, microprocessors, application specific integrated circuits (ASICs), and programmable logic. Programmable logic integrated circuits such as PALS, PLDs, FPGAs, LCAs, and others are becoming more complex and continually evolving to provide more user-programmable features on a single integrated circuit.
Modern programmable logic integrated circuits incorporate programmable logic including logic gates, product terms, or look-up tables. Some programmable logic integrated circuits also include embedded user-programmable memory or RAM. However, this RAM is volatile, which means once power is removed from the integrated circuit, the contents of the RAM are lost.
Despite the success of programmable logic, there is a continuing desire to provide greater functionality in a programmable logic integrated circuit, but at the same time, provide greater performance. There is a need to provide programmable logic (configurable using volatile memory such as SRAM) with on-chip nonvolatile memory. This nonvolatile memory may be used as storage for configuration data, used to program the SRAMs upon power up of the integrated circuit.
When the integrated circuit is powered up, the voltages to the internal circuits may not be at their full operating levels. It is important that during power up of the integrated circuit, the configuration data is transferred to the programmable logic as quickly, accurately, and reliably as possible.
Therefore, there is a need to provide techniques and circuitry for ensuring the fast, accurate, proper, and reliable transfer of configuration data from an on-chip nonvolatile memory to the programmable logic core of a programmable logic integrated circuit.